© 2004-2012 IEEE. Delta Sigma data converters employing high order dynamic element matching (DEM) allow for accurate signal conversion in the presence of DAC mismatch. However, at low oversampling rates, current high order DEM decoders provide little or no improvement in error suppression over lower order designs. In addition, the logic requirement of the DEM decoder increases significantly with each additional DAC bit. This brief presents a high order DEM decoder that improves mismatch shaping performance at low to medium oversampling rates by up to 15 dB, while employing methods to reduce the area overhead of the vector quantizer in the design.